Many electronic devices and systems have the capability to store and retrieve information in a memory. A number of different memory families (e.g., DRAM, MRAM, pseudo-SRAM, NOR-flash, NAND-flash, etc.) are currently used for memory devices in such systems. Memory devices based on emerging technologies may be suitable as replacements for such current types of memory devices.
One type of memory that is suitable for use in electronic devices is resistive memory, which utilizes the resistance value of a memory element to store one or more bits of data. For example, a memory element programmed to have a high resistance value may represent a logic “1” data bit value and a memory element programmed to have a low resistance value may represent a logic “0” data bit value. Typically, the resistance value of the memory element is switched electrically by applying a voltage pulse or a current pulse to the memory element.
One type of resistive memory is phase change memory, which utilizes a phase change material as the resistive memory element. The phase change material exhibits at least two different electrical states. The states of the phase change material are an amorphous state and a crystalline state, where the amorphous state involves a more disordered atomic structure and the crystalline state involves a more ordered lattice. The amorphous state usually exhibits higher resistivity than the crystalline state. Also, some phase change materials exhibit multiple crystalline states, e.g., a face-centered cubic (FCC) state and a hexagonal closest packing (HCP) state, which can have different resistivities and may be used to store bits of data. As described herein, the amorphous state generally corresponds to a higher resistivity of the phase change material and the crystalline state generally refers to a lower resistivity of the phase change material (i.e., the phase change material has a higher resistivity in an amorphous state in comparison to a crystalline state of the phase change material).
Phase changes in the phase change materials may be induced reversibly, such that the memory changes from the amorphous state to the crystalline state and from the crystalline state to the amorphous state in response to heat pulses. The temperature changes of the phase change material may be achieved by driving current through a resistive heater proximate or adjacent the phase change material so as to provide ohmic heating to the phase change material. Controllable heating of the phase change material causes controllable phase change within the phase change material.
A phase change memory device can include a memory array having a plurality of memory cells that are made of phase change material and are programmable to store data utilizing the memory states of the phase change material. One way to read and write data in such a phase change memory device is to control a current and/or a voltage pulse that is applied to the phase change material. The temperature in the phase change material in each memory cell generally corresponds to the applied level of current and/or voltage to achieve the heating. For example, a phase change material that is assignable to two different resistive states can be set from an amorphous state to a crystalline state by sending a current pulse through the phase change material so as to heat the phase change material above its crystallization temperature (lowering its resistance). To reset the phase change to its amorphous (higher resistance) state, a high current pulse with a short falling edge is applied to the phase change material, causing the phase change material to melt and become amorphous during subsequent quench cooling of the material.
To achieve higher density phase change memories, a phase change memory cell can store multiple bits of data. Multi-bit storage in a phase change memory cell can be achieved by programming the phase change material to have intermediate resistance values or states, where the multi-bit or multilevel phase change memory cell can be written to more than two states. If the phase change memory cell is programmed to one of three different resistance levels, 1.5 bits of data per cell can be stored. If the phase change memory cell is programmed to one of four different resistance levels, two bits of data per cell can be stored, and so on. To program a phase change memory cell to an intermediate resistance value, the amount of crystalline material coexisting with amorphous material and hence the cell resistance is controlled via a suitable write strategy.
The trend to miniaturize semiconductor devices drives the technology development to smaller feature sizes and to shrinkage of critical dimensions. In addition, the high current density required to change the phase change material from a crystalline to an amorphous state (e.g., on the order of 107 A/cm2) typically requires phase-change memory structures to package the heater and sometimes the phase-change material itself in sublithographic dimensions (e.g., dimensions less than 100 nm, typically no greater than about 40 nm).
For example, a comparison of reset current vs. heater contact area for a Ge—Sb—Te (GST) phase change material layer is set forth in the plot of FIG. 7 (reprinted from A. Pirovano et al., Scaling Analysis of Phase-Change Memory Technology, Electron Devices Meeting, 2003, IEDM '03 Technical Digest, IEEE International, pages 29.6.1-29.6.4). In order to reduce the reset current to values of about 100 μA or less, the heater contact area should be no greater than about 250 nm2 (with a cross section or diameter of the heater contact being no greater than about 18 nm).
The production of memory structures with portions having sublithographic dimensions can be complex and expensive.
It would be desirable to provide a resistive memory element (such as a phase change memory element) including an electrically conductive structure for the memory element having decreased dimensions and that is less complex and expensive to manufacture in comparison to conventional, sublithographic manufacturing techniques.